We are seeking a strong technical R&D contributor to join the Xcelium team, which develops Cadence’s industry-leading logic simulator. Our team builds advanced multi-core technologies within Xcelium, including Distributed Simulation, Multi-Core Checkers, and Xcelium multi-core technology for gate-level verification.
This role will focus primarily on Xcelium Distributed Simulation and Multi-Core Checker technologies, delivering solutions for top-priority customers and generalizing them into scalable, production-quality capabilities for broader customer adoption. The successful candidate will work on core simulator infrastructure and multi-core simulation technologies, with a strong emphasis on performance, correctness, and predictability.
Xcelium Distributed Simulation Development
- Design, implement, and maintain Xcelium Distributed Simulation capabilities that enable a single simulation to be distributed across multiple processes running on different machines while communicating and behaving as one coherent simulation.
- Improve usability and optimize performance for distributed simulation by simplifying configuration, setup, and diagnostics, and by implementing targeted optimizations for top-priority customer scenarios.
Multi-Core Technologies
- Contribute to the development and integration of Multi-Core Checkers, a technology that speeds up simulation by offloading checker modules to different cores while preserving simulation correctness.
- Participate in enhancements to Xcelium multi-core technology, including critical bug fixes, performance optimizations, and usability improvements.
- Contribute to Xcelium multi-core RTL technology for extending the existing technology to accelerate RTL designs.
Customer-Driven R&D and Productization
- Translate requirements from top-priority customers into robust, scalable technical solutions that address real-world simulation challenges and are suitable for a wide range of Xcelium users and design environments.
- Collaborate closely with product engineering, field application engineers, customer-facing teams, and senior R&D stakeholders to analyze issues, define solutions, and drive successful adoption.
Performance, Scalability & Usability
- Analyze performance bottlenecks in distributed and multi-core simulation flows and implement optimizations that improve runtime, scalability, and resource utilization.
- Improve user experience through clear error reporting, practical defaults, automation opportunities, and documentation-friendly workflows.
Quality, Debuggability & Production Readiness
- Develop high-quality code with attention to correctness, maintainability, diagnostics, regression coverage, and long-term product support.
- Investigate complex functional, performance, and customer-reported issues across distributed simulation, Multi-Core Checkers, and related Xcelium multi-core technologies.
- Work with product validation teams to define meaningful test coverage and regression strategies.
Cross-Functional Collaboration
- Partner with local and global R&D teams to align architecture, implementation, and delivery plans across Xcelium multi-core technologies.
- Participate in technical reviews, design discussions, debugging sessions, and customer-driven planning activities.
Technical Ownership
- Take ownership of significant feature areas from investigation and design through implementation, validation, delivery, and follow-up support.
- Contribute to technical documentation, internal knowledge sharing, and best practices for distributed simulation, Multi-Core Checkers, and Xcelium multi-core development.
- Stay current with advanced verification workloads, large-scale SoC simulation requirements, and emerging needs in high-performance simulation technology.
Task Management & Agile Execution
- Coordinate team-level task management through Jira boards by organizing work, maintaining priorities, tracking progress, and ensuring alignment with project and release objectives.
- Drive sprint execution by facilitating planning, prioritization, and progress reviews, while helping identify risks, remove blockers, and improve team predictability and delivery efficiency.
Requirements:
- Bachelor’s or master’s degree in computer science, Electrical Engineering, Computer Engineering, or a related technical discipline.
- 10+ years of hands-on software development experience in complex C/C++ systems, preferably in EDA, simulation, compilers, runtime systems, or high-performance computing.
- Strong understanding of multi-threaded, multi-process, or distributed software architectures, including synchronization, communication, debugging, and performance analysis.
- Experience developing performance-sensitive infrastructure where scalability, correctness, reliability, and usability are critical.
- Good knowledge of Linux development environments, debugging tools, source control, build systems, and regression-driven development practices.
- Familiarity with SystemVerilog, Verilog, UVM, logic simulation, or semiconductor verification flows is highly desirable.
- Experience with EDA simulation technologies, distributed or multi-threaded systems, and inter-process communication is a strong advantage.
- Strong analytical and debugging skills, with the ability to investigate complex technical issues across large codebases and customer environments.
- Excellent communication skills in English, with the ability to collaborate effectively with global R&D, product engineering, field, and customer-facing teams.
- Self-motivated, detail-oriented, and comfortable taking ownership of challenging technical problems from concept to production deployment.
Pay: $100,000.00 – $180,000.00 per year
Work Location: Hybrid remote in Adelaide SA
